Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set
The N-body simulations have become a powerful tool to test the gravitational interaction among particles, ranging from a few bodies to complete galaxies. Even though N-body has already been optimized on many parallel platforms, there are hardly any studies which take advantage of the latest Intel ar...
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Autores principales: | , , , |
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Formato: | Objeto de conferencia |
Lenguaje: | Español |
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2020
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Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/95855 |
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I19-R120-10915-95855 |
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Universidad Nacional de La Plata |
institution_str |
I-19 |
repository_str |
R-120 |
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SEDICI (UNLP) |
language |
Español |
topic |
Ciencias Informáticas N-body AVX-512 Xeon Phi Knights Landing Xeon Platinum Skylake Cascade Lake |
spellingShingle |
Ciencias Informáticas N-body AVX-512 Xeon Phi Knights Landing Xeon Platinum Skylake Cascade Lake Rucci, Enzo Moreno, Ezequiel Tomás Pousa, Adrián Chichizola, Franco Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set |
topic_facet |
Ciencias Informáticas N-body AVX-512 Xeon Phi Knights Landing Xeon Platinum Skylake Cascade Lake |
description |
The N-body simulations have become a powerful tool to test the gravitational interaction among particles, ranging from a few bodies to complete galaxies. Even though N-body has already been optimized on many parallel platforms, there are hardly any studies which take advantage of the latest Intel architectures based on AVX-512 instruction set. This SIMD set was initially supported by Intel’s Xeon Phi Knights Landing (KNL) manycore processors launched at 2016. Recently, it has been included in Intel’s general-purpose processors too, starting at the Skylake (SKL) server microarchitecture and now in its successor Cascade Lake (CKL). This paper optimizes the all-pairs N-body simulation on both current Intel platforms supporting AVX-512 extensions: a Xeon Phi KNL node and a server equipped with a dual CKL processor. On the basis of a naive implementation, it is shown how the parallel implementation (can) reach, through different optimization techniques, 2355 and 2449 GFLOPS on the Xeon Phi KNL and the Xeon CKL platforms, respectively. |
format |
Objeto de conferencia Objeto de conferencia |
author |
Rucci, Enzo Moreno, Ezequiel Tomás Pousa, Adrián Chichizola, Franco |
author_facet |
Rucci, Enzo Moreno, Ezequiel Tomás Pousa, Adrián Chichizola, Franco |
author_sort |
Rucci, Enzo |
title |
Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set |
title_short |
Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set |
title_full |
Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set |
title_fullStr |
Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set |
title_full_unstemmed |
Optimization of the N-body Simulation on Intel’s Architectures Based on AVX-512 Instruction Set |
title_sort |
optimization of the n-body simulation on intel’s architectures based on avx-512 instruction set |
publishDate |
2020 |
url |
http://sedici.unlp.edu.ar/handle/10915/95855 |
work_keys_str_mv |
AT ruccienzo optimizationofthenbodysimulationonintelsarchitecturesbasedonavx512instructionset AT morenoezequieltomas optimizationofthenbodysimulationonintelsarchitecturesbasedonavx512instructionset AT pousaadrian optimizationofthenbodysimulationonintelsarchitecturesbasedonavx512instructionset AT chichizolafranco optimizationofthenbodysimulationonintelsarchitecturesbasedonavx512instructionset |
bdutipo_str |
Repositorios |
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