Power-efficient memory bus encoding using stride-based stream reconstruction

With the rapid increase in the complexity of chips and the popularity of portable devices, the performance demand is not any more the only important constraint in the embedded system. In stead, energy consumption has become one of the main design issues for contemporary embedded systems, especially...

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Autores principales: Chang, Kuei-Chung, Hsieh, Tsung-Ming, Chen, Tien-Fu
Formato: Articulo
Lenguaje:Inglés
Publicado: 2007
Materias:
Ciencias Informáticas
bus encoding
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/9547
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Apr07-4.pdf
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-9547
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Inglés
topic Ciencias Informáticas
bus encoding
spellingShingle Ciencias Informáticas
bus encoding
Chang, Kuei-Chung
Hsieh, Tsung-Ming
Chen, Tien-Fu
Power-efficient memory bus encoding using stride-based stream reconstruction
topic_facet Ciencias Informáticas
bus encoding
description With the rapid increase in the complexity of chips and the popularity of portable devices, the performance demand is not any more the only important constraint in the embedded system. In stead, energy consumption has become one of the main design issues for contemporary embedded systems, especially for I/O interface due to the high capacitance of bus transition. In this paper, we propose a bus encoding scheme, which may reduce transitions by reconstructing active address streams with variable cached strides. The key idea is to obtain the variable strides for dierent sets of active addressing streams such that the decoder reconstructs these interlaced streams with these strides. Instead of sending the full address, the encoder may only send partial ad- dress or stride by using either one-hot or binary-inversion encoding. To exploit the locality and dynamically adjust the value of stride of active address streams, we partially compare the previous addresses of existing streams with the current address. Hence, the data transmitted on the bus can be minimally encoded. Experiments with several MediaBench benchmarks show that the scheme can achieve an average of 60% reduction in bus switching activity.
format Articulo
Articulo
author Chang, Kuei-Chung
Hsieh, Tsung-Ming
Chen, Tien-Fu
author_facet Chang, Kuei-Chung
Hsieh, Tsung-Ming
Chen, Tien-Fu
author_sort Chang, Kuei-Chung
title Power-efficient memory bus encoding using stride-based stream reconstruction
title_short Power-efficient memory bus encoding using stride-based stream reconstruction
title_full Power-efficient memory bus encoding using stride-based stream reconstruction
title_fullStr Power-efficient memory bus encoding using stride-based stream reconstruction
title_full_unstemmed Power-efficient memory bus encoding using stride-based stream reconstruction
title_sort power-efficient memory bus encoding using stride-based stream reconstruction
publishDate 2007
url http://sedici.unlp.edu.ar/handle/10915/9547
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Apr07-4.pdf
work_keys_str_mv AT changkueichung powerefficientmemorybusencodingusingstridebasedstreamreconstruction
AT hsiehtsungming powerefficientmemorybusencodingusingstridebasedstreamreconstruction
AT chentienfu powerefficientmemorybusencodingusingstridebasedstreamreconstruction
bdutipo_str Repositorios
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