Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures
Chip-multiprocessor systems or CMPs have emerged as a high-perfomance organization for the increasing number of transistors available on a chip, and are projected to dominate the market of server and desktop computers. CMPs require innovative designs of on-chip memory hierarchies, especially designe...
Guardado en:
| Autores principales: | , , |
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| Formato: | Articulo |
| Lenguaje: | Inglés |
| Publicado: |
2006
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| Materias: | |
| Acceso en línea: | http://sedici.unlp.edu.ar/handle/10915/9512 http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Apr06-1.pdf |
| Aporte de: |
| id |
I19-R120-10915-9512 |
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| record_format |
dspace |
| institution |
Universidad Nacional de La Plata |
| institution_str |
I-19 |
| repository_str |
R-120 |
| collection |
SEDICI (UNLP) |
| language |
Inglés |
| topic |
Ciencias Informáticas Multiple Data Stream Architectures (Multiprocessors) Cache memories |
| spellingShingle |
Ciencias Informáticas Multiple Data Stream Architectures (Multiprocessors) Cache memories Villa, Francisco J. Acacio Sánchez, Manuel García Carrasco, José Manuel Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures |
| topic_facet |
Ciencias Informáticas Multiple Data Stream Architectures (Multiprocessors) Cache memories |
| description |
Chip-multiprocessor systems or CMPs have emerged as a high-perfomance organization for the increasing number of transistors available on a chip, and are projected to dominate the market of server and desktop computers. CMPs require innovative designs of on-chip memory hierarchies, especially designed to address the problems that arise in this novel kind of architecture: higher memory bandwidh demand from more processing cores and the increasing latency of off-chip cache misses. Moreover, the energy consumption topic is even more pressing than in traditionalmultiprocessors, as the CMPs are commonly used in embedded systems. This paper presents a survey of some of the proposals that have recently appeared facing these topics. |
| format |
Articulo Articulo |
| author |
Villa, Francisco J. Acacio Sánchez, Manuel García Carrasco, José Manuel |
| author_facet |
Villa, Francisco J. Acacio Sánchez, Manuel García Carrasco, José Manuel |
| author_sort |
Villa, Francisco J. |
| title |
Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures |
| title_short |
Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures |
| title_full |
Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures |
| title_fullStr |
Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures |
| title_full_unstemmed |
Toward Energy-Efficient High-Performance Organizations of the Memory Hierarchy in Chip-Multiprocessors Architectures |
| title_sort |
toward energy-efficient high-performance organizations of the memory hierarchy in chip-multiprocessors architectures |
| publishDate |
2006 |
| url |
http://sedici.unlp.edu.ar/handle/10915/9512 http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Apr06-1.pdf |
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AT villafranciscoj towardenergyefficienthighperformanceorganizationsofthememoryhierarchyinchipmultiprocessorsarchitectures AT acaciosanchezmanuel towardenergyefficienthighperformanceorganizationsofthememoryhierarchyinchipmultiprocessorsarchitectures AT garciacarrascojosemanuel towardenergyefficienthighperformanceorganizationsofthememoryhierarchyinchipmultiprocessorsarchitectures |
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Repositorios |
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