AES development in FPGA

The National Institute of Standards and Technology (NIST) created a new standard known as Advanced Encryption Standard (AES), with the objective of developing the Federal Information Processing Standard (FIPS) which specifies an encryption algorithm capable of protecting sensitive information to be...

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Detalles Bibliográficos
Autor principal: Villagarcía Wanza, Horacio A.
Formato: Articulo Revision
Lenguaje:Español
Publicado: 2006
Materias:
Ciencias Informáticas
Rijndael
criptografía
Acceso en línea:http://sedici.unlp.edu.ar/handle/10915/52001
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct06-TO1.pdf
Aporte de:
SEDICI (UNLP) de Universidad Nacional de La Plata
id I19-R120-10915-52001
record_format dspace
institution Universidad Nacional de La Plata
institution_str I-19
repository_str R-120
collection SEDICI (UNLP)
language Español
topic Ciencias Informáticas
Rijndael
criptografía
spellingShingle Ciencias Informáticas
Rijndael
criptografía
Villagarcía Wanza, Horacio A.
AES development in FPGA
topic_facet Ciencias Informáticas
Rijndael
criptografía
description The National Institute of Standards and Technology (NIST) created a new standard known as Advanced Encryption Standard (AES), with the objective of developing the Federal Information Processing Standard (FIPS) which specifies an encryption algorithm capable of protecting sensitive information to be used by the government of the United States. In October 2000, the NIST selected Rijndael as the algorithm proposed for the AES. The algorithm has a round shape made up by three uniform and non-reversible transformations which assures broadcast over the total set of fixed rounds and optimal non-linearity properties. This thesis presents an 8-bit FPGA implementation of the 128-bit block and 128 bit-key AES cipher.
format Articulo
Revision
author Villagarcía Wanza, Horacio A.
author_facet Villagarcía Wanza, Horacio A.
author_sort Villagarcía Wanza, Horacio A.
title AES development in FPGA
title_short AES development in FPGA
title_full AES development in FPGA
title_fullStr AES development in FPGA
title_full_unstemmed AES development in FPGA
title_sort aes development in fpga
publishDate 2006
url http://sedici.unlp.edu.ar/handle/10915/52001
http://journal.info.unlp.edu.ar/wp-content/uploads/JCST-Oct06-TO1.pdf
work_keys_str_mv AT villagarciawanzahoracioa aesdevelopmentinfpga
bdutipo_str Repositorios
_version_ 1764820476361703429

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