Digital VLSI Design with Verilog A Textbook from Silicon Valley Polytechnic Institute /
This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synt...
Guardado en:
| Autor principal: | |
|---|---|
| Formato: | Libro electrónico |
| Lenguaje: | Inglés |
| Publicado: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
|
| Edición: | 2nd ed. |
| Materias: | |
| Acceso en línea: | http://dx.doi.org/10.1007/978-3-319-04789-8 |
| Aporte de: | Registro referencial: Solicitar el recurso aquí |
| LEADER | 03414Cam#a22004575i#4500 | ||
|---|---|---|---|
| 001 | INGC-EBK-000428 | ||
| 003 | AR-LpUFI | ||
| 005 | 20220927105846.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 140617s2014 gw | s |||| 0|eng d | ||
| 020 | |a 9783319047898 | ||
| 024 | 7 | |a 10.1007/978-3-319-04789-8 |2 doi | |
| 050 | 4 | |a TK7888.4 | |
| 072 | 7 | |a TJFC |2 bicssc | |
| 072 | 7 | |a TEC008010 |2 bisacsh | |
| 100 | 1 | |a Williams, John Michael. |9 261040 | |
| 245 | 1 | 0 | |a Digital VLSI Design with Verilog |h [libro electrónico] : ; |b A Textbook from Silicon Valley Polytechnic Institute / |c by John Michael Williams. |
| 250 | |a 2nd ed. | ||
| 260 | 1 | |a Cham : |b Springer International Publishing : |b Imprint: Springer, |c 2014. | |
| 300 | |a xvi, 553 p. : |b il. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 505 | 0 | |a Introductory Material -- Week 1 Class 1 -- Week 1 Class 2 -- Week 2 Class 1 -- Week 2 Class 2 -- Week 3 Class 1 -- Week 3 Class 2 -- Week 4 Class 1 -- Week 4 Class 2 -- Week 5 Class 1 -- Week 5 Class 2 -- Week 6 Class 1 -- Week 6 Class 2 -- Week 7 Class 1 -- Week 7 Class 2 -- Week 8 Class 1 -- Week 8 Class 2 -- Week 9 Class 1 -- Week 9 Class 2 -- Week 10 Class 1 -- Week 10 Class 2 -- Week 11Â Class 1 -- Week 11 Class 2 -- Week 12 Class 1 -- Week 12 Class 2. | |
| 520 | |a This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation, and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book. For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book.  A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test.  A concluding presentation of special topics includes SystemVerilog and Verilog-AMS.  Covers the entire Verilog language â_" using most of it in practice; Provides 27 lab exercises, with complete and tested answers; Explains and emphasizes synthesizability, wherever it pertains to language features; Develops as a major project a synthesizable 70,000-gate SerDes; Presents synthesis-relevant usage of SystemVerilog, and the basic functionality of Verilog-AMS. ]. | ||
| 650 | 0 | |a Engineering. |9 259622 | |
| 650 | 0 | |a Microprocessors. |9 259640 | |
| 650 | 0 | |a Electronics. |9 259648 | |
| 650 | 0 | |a Microelectronics. |9 259649 | |
| 650 | 0 | |a Electronic circuits. |9 259798 | |
| 650 | 2 | 4 | |a Circuits and Systems. |9 259651 |
| 650 | 2 | 4 | |a Processor Architectures. |9 259645 |
| 650 | 2 | 4 | |a Instrumentation. |9 259652 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319047881 |
| 856 | 4 | 0 | |u http://dx.doi.org/10.1007/978-3-319-04789-8 |
| 912 | |a ZDB-2-ENG | ||
| 929 | |a COM | ||
| 942 | |c EBK |6 _ | ||
| 950 | |a Engineering (Springer-11647) | ||
| 999 | |a SKV |c 27856 |d 27856 | ||