Charge trapping/detrapping in HfO2-based MOS devices

The charge trapping/detrapping under normal operating conditions in MOS devices with HfO2 as insulating layer is studied. The hysteresis in the capacitance-voltage curves was analyzed and the voltage for a given capacitance was tracked in time. A simple tunneling front model is proposed in order to...

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Publicado: 2011
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Acceso en línea:https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_97898716_v_n_p113_Salomone
http://hdl.handle.net/20.500.12110/paper_97898716_v_n_p113_Salomone
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spelling paper:paper_97898716_v_n_p113_Salomone2023-06-08T16:39:15Z Charge trapping/detrapping in HfO2-based MOS devices High-K gate dielectrics hysteresis MOS devices Capacitance-voltage curve Charge trapping/detrapping High-k gate dielectrics Insulating layers Normal operating conditions Physical parameters Capacitance Gate dielectrics Hafnium oxides Hysteresis Nanoelectronics MOS devices The charge trapping/detrapping under normal operating conditions in MOS devices with HfO2 as insulating layer is studied. The hysteresis in the capacitance-voltage curves was analyzed and the voltage for a given capacitance was tracked in time. A simple tunneling front model is proposed in order to reproduce the observed curves and to obtain the relevant physical parameters. © 2011 EDIUNS. 2011 https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_97898716_v_n_p113_Salomone http://hdl.handle.net/20.500.12110/paper_97898716_v_n_p113_Salomone
institution Universidad de Buenos Aires
institution_str I-28
repository_str R-134
collection Biblioteca Digital - Facultad de Ciencias Exactas y Naturales (UBA)
topic High-K gate dielectrics
hysteresis
MOS devices
Capacitance-voltage curve
Charge trapping/detrapping
High-k gate dielectrics
Insulating layers
Normal operating conditions
Physical parameters
Capacitance
Gate dielectrics
Hafnium oxides
Hysteresis
Nanoelectronics
MOS devices
spellingShingle High-K gate dielectrics
hysteresis
MOS devices
Capacitance-voltage curve
Charge trapping/detrapping
High-k gate dielectrics
Insulating layers
Normal operating conditions
Physical parameters
Capacitance
Gate dielectrics
Hafnium oxides
Hysteresis
Nanoelectronics
MOS devices
Charge trapping/detrapping in HfO2-based MOS devices
topic_facet High-K gate dielectrics
hysteresis
MOS devices
Capacitance-voltage curve
Charge trapping/detrapping
High-k gate dielectrics
Insulating layers
Normal operating conditions
Physical parameters
Capacitance
Gate dielectrics
Hafnium oxides
Hysteresis
Nanoelectronics
MOS devices
description The charge trapping/detrapping under normal operating conditions in MOS devices with HfO2 as insulating layer is studied. The hysteresis in the capacitance-voltage curves was analyzed and the voltage for a given capacitance was tracked in time. A simple tunneling front model is proposed in order to reproduce the observed curves and to obtain the relevant physical parameters. © 2011 EDIUNS.
title Charge trapping/detrapping in HfO2-based MOS devices
title_short Charge trapping/detrapping in HfO2-based MOS devices
title_full Charge trapping/detrapping in HfO2-based MOS devices
title_fullStr Charge trapping/detrapping in HfO2-based MOS devices
title_full_unstemmed Charge trapping/detrapping in HfO2-based MOS devices
title_sort charge trapping/detrapping in hfo2-based mos devices
publishDate 2011
url https://bibliotecadigital.exactas.uba.ar/collection/paper/document/paper_97898716_v_n_p113_Salomone
http://hdl.handle.net/20.500.12110/paper_97898716_v_n_p113_Salomone
_version_ 1769175845099798528