On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies
A digitally-programmable analogue fuzzy logic controller (FLC) is presented. Input and output signals are processed in the analog domain whereas the parameters of the controller are stored in a built-in digital memory. Some new functional blocks have been designed whereas others were improved toward...
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Acceso en línea: | http://pa.bibdigital.ucc.edu.ar/3931/1/A_Dualibe_Jespers_Verleysen.pdf |
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I38-R144-39312023-07-04T17:00:17Z http://pa.bibdigital.ucc.edu.ar/3931/ On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies Dualibe, Fortunato Carlos Augusto Jespers, Paul Verleysen, Michel TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General) A digitally-programmable analogue fuzzy logic controller (FLC) is presented. Input and output signals are processed in the analog domain whereas the parameters of the controller are stored in a built-in digital memory. Some new functional blocks have been designed whereas others were improved towards the optimisation of the power consumption, the speed and the modularity while keeping a reasonable accuracy, as it is needed in several analogue signal processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4μ technology, showing good agreement with the expected performances, namely: from 2.22 to 5.26 Mflips (mega fuzzy logic inferences per second) at the pin terminals (@CL= 13pF), 933 μW power consumption per rule (@Vdd=5V) and 5 bits of resolution. Since the circuit is intended for a subsystem embedded in an application chip (@CL≤5pF) up to 8 Mflips may be expected. 2001-12-01 application/pdf spa http://pa.bibdigital.ucc.edu.ar/3931/1/A_Dualibe_Jespers_Verleysen.pdf Dualibe, Fortunato Carlos Augusto ORCID: https://orcid.org/0000-0002-2889-315X <https://orcid.org/0000-0002-2889-315X>, Jespers, Paul and Verleysen, Michel ORCID: https://orcid.org/0000-0003-4366-6155 <https://orcid.org/0000-0003-4366-6155> (2001) On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies. In: Symposium on Integrated Circuits and Systems Design, SBCCI. info:eu-repo/semantics/altIdentifier/doi/10.1109/SBCCI.2001.953026 info:eu-repo/semantics/conferenceObject info:ar-repo/semantics/documento de conferencia info:eu-repo/semantics/acceptedVersion Fil: Dualibe, Fortunato Carlos Augusto. Universidad Católica de Córdoba. Facultad de Ingeniería; Argentina Fil: Jespers, Paul. Université Catholique de Louvain; Belgium Fil: Verleysen, Michel. Université Catholique de Louvain; Belgium info:eu-repo/semantics/openAccess https://creativecommons.org/licenses/by-nc-nd/4.0/deed.es |
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Universidad Católica de Córdoba |
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I-38 |
repository_str |
R-144 |
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Producción Académica Universidad Católica de Córdoba (UCCor) |
language |
Español |
orig_language_str_mv |
spa |
topic |
TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General) |
spellingShingle |
TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General) Dualibe, Fortunato Carlos Augusto Jespers, Paul Verleysen, Michel On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies |
topic_facet |
TA Ingeniería de asistencia técnica (General). Ingeniería Civil (General) |
description |
A digitally-programmable analogue fuzzy logic controller (FLC) is presented. Input and output signals are processed in the analog domain whereas the parameters of the controller are stored in a built-in digital memory. Some new functional blocks have been designed whereas others were improved towards the optimisation of the power consumption, the speed and the modularity while keeping a reasonable accuracy, as it is needed in several analogue signal processing applications. A nine-rules, two-inputs and one-output prototype was fabricated and successfully tested using a standard CMOS 2.4μ technology, showing good agreement with the expected performances, namely: from 2.22 to 5.26 Mflips (mega fuzzy logic inferences per second) at the pin terminals (@CL= 13pF), 933 μW power consumption per rule (@Vdd=5V) and 5 bits of resolution. Since the circuit is intended for a subsystem embedded in an application chip (@CL≤5pF) up to 8 Mflips may be expected. |
format |
Documento de conferencia Documento de conferencia acceptedVersion |
author |
Dualibe, Fortunato Carlos Augusto Jespers, Paul Verleysen, Michel |
author_facet |
Dualibe, Fortunato Carlos Augusto Jespers, Paul Verleysen, Michel |
author_sort |
Dualibe, Fortunato Carlos Augusto |
title |
On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies |
title_short |
On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies |
title_full |
On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies |
title_fullStr |
On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies |
title_full_unstemmed |
On designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard CMOS technologies |
title_sort |
on designing mixed-signal programmable fuzzy logic controllers as embedded subsystems in standard cmos technologies |
publishDate |
2001 |
url |
http://pa.bibdigital.ucc.edu.ar/3931/1/A_Dualibe_Jespers_Verleysen.pdf |
work_keys_str_mv |
AT dualibefortunatocarlosaugusto ondesigningmixedsignalprogrammablefuzzylogiccontrollersasembeddedsubsystemsinstandardcmostechnologies AT jesperspaul ondesigningmixedsignalprogrammablefuzzylogiccontrollersasembeddedsubsystemsinstandardcmostechnologies AT verleysenmichel ondesigningmixedsignalprogrammablefuzzylogiccontrollersasembeddedsubsystemsinstandardcmostechnologies |
_version_ |
1770623745195507712 |