Design of complementary low-power CMOS architectures for looser-take-all and winner-take-all
A novel architecture for winner-take-all (WTA) and looser-take-all (LTA) circuits is proposed. As compared with other realisations, the LTA does not require input subtraction from a reference, which decreases accuracy and input dynamics. The architectures have been designed using the gm/ID methodolo...
Guardado en:
| Autores principales: | Donckers, N., Dualibe, Fortunato Carlos Augusto, Verleysen, Michel |
|---|---|
| Formato: | Documento de conferencia acceptedVersion |
| Lenguaje: | Español |
| Publicado: |
1999
|
| Materias: | |
| Acceso en línea: | http://pa.bibdigital.ucc.edu.ar/3733/1/DC_Donckers_Dualibe_Verleysen.pdf |
| Aporte de: |
Ejemplares similares
-
Two-quadrant CMOS analogue divider
por: Dualibe, Fortunato Carlos Augusto, et al.
Publicado: (1998) -
A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to gm-C filters
por: De Lima, Jader, et al.
Publicado: (2001) -
Winner-take-all politics : how Washington made the rich richer and turned its back on the middle class /
por: Hacker, Jacob S.
Publicado: (2010) -
Plataforma básica para una red de sensores inteligentes
por: Toledo, Luis Eduardo, et al.
Publicado: (2006) -
Plataforma Básica para dispositivos inteligentes
por: Toledo, Luis Eduardo, et al.
Publicado: (2004)